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d a t a sh eet product speci?cation file under integrated circuits, ic03a june 1990 integrated circuits tea1067 low voltage versatile telephone transmission circuit with dialler interface
june 1990 2 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 general description the tea1067 is a bipolar integrated circuit performing all speech and line interface functions required in fully electronic telephone sets. it performs electronic switching between dialling and speech. the circuit is able to operate down to a dc line voltage of 1.6 v (with reduced performance) to facilitate the use of more telephone sets in parallel. features low dc line voltage; operates down to 1.6 v (excluding polarity guard) voltage regulator with adjustable static resistance provides supply with limited current for external circuitry symmetrical high-impedance inputs (64 k w ) for dynamic, magnetic or piezoelectric microphones asymmetrical high-impedance input (32 k w ) for electret microphone dtmf signal input with confidence tone mute input for pulse or dtmf dialling power down input for pulse dial or register recall receiving amplifier for magnetic, dynamic or piezoelectric earpieces large gain setting range on microphone and earpiece amplifiers line current dependent line loss compensation facility for microphone and earpiece amplifiers gain control adaptable to exchange supply dc line voltage adjustment capability quick reference data package outlines parameter conditions symbol min. typ. max. unit line voltage i line = 15 ma v ln 3.65 3.9 4.15 v line current operating range normal operation tea1067 i line 11 - 140 ma TEA1067T i line 11 - 140 ma with reduced performance i line 1 - 11 ma internal supply current power down input low i cc - 1 1.35 ma input high i cc - 55 82 m a supply voltage for peripherals i line = 15 ma; i p = 1.4 ma; mute input high v cc 2.2 2.4 - v i line = 15 ma; i p = 0.9 ma; mute input high v cc 2.5 -- v voltage gain range microphone amplifier g v 44 - 52 db receiving amplifier g v 20 - 45 db line loss compensation gain control range d g v 5.5 5.9 6.3 db exchange supply voltage range v exch 36 - 60 v exchange feeding bridge resistance range r exch 0.4 - 1k w tea1067: 18-lead dil; plastic (sot102). sot102-1; 1998 jun 18. TEA1067T: 20-lead mini-pack; plastic (so20; sot163a). sot163-1; 1998 jun 18.
june 1990 3 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 fig.1 block diagram. figures in parenthesis refer to TEA1067T. handbook, full pagewidth + mgr082 current reference low voltage circuit agc circuit supply and reference 16 (18) 10 (11) v ee reg agc stab slpe gas2 gas1 qr - qr + gar ln v cc 12 (14) 14 (16) 13 (15) db db (1) 7 (7) 8 (9) + - + - 17 (19) 9 (10) (20)18 11 (12) ir mic + mic - dtmf mute pd + - + - + - + - - (1)1 15 (17) tea1067 TEA1067T (6) 6 (5) 5 (4) 4 (2) 2 (3) 3
june 1990 4 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 pinning fig.2 pinning diagram for tea1067 18-lead dil version. handbook, halfpage ln gas1 gas2 qr - qr + gar mic - mic + stab slpe agc reg v cc dtmf pd mute ir v ee 1 2 3 4 5 6 7 8 9 10 11 12 18 17 16 15 14 13 tea1067 mgr084 1 ln positive line terminal 2 gas1 gain adjustment; transmitting ampli?er 3 gas2 gain adjustment; transmitting ampli?er 4qr - inverting output; receiving ampli?er 5qr + non-inverting output receiving ampli?er 6 gar gain adjustment; receiving ampli?er 7 mic - inverting microphone input 8 mic + non-inverting microphone input 9 stab current stabilizer 10 v ee negative line terminal 11 ir receiving ampli?er input 12 pd power-down input 13 dtmf dual-tone multi-frequency input 14 mute mute input 15 v cc positive supply decoupling 16 reg voltage regulator decoupling 17 agc automatic gain control input 18 slpe slope (dc resistance) adjustment fig.3 pinning diagram for TEA1067T 20-lead mini-pack version. handbook, halfpage 1 2 3 4 5 6 7 8 9 10 11 12 20 19 18 17 16 15 14 13 TEA1067T mgr083 ln gas1 gas2 qr - qr + gar mic - mic + stab slpe agc reg v cc dtmf n.c. n.c. pd mute ir v ee 1 ln positive line terminal 2 gas1 gain adjustment; transmitting ampli?er 3 gas2 gain adjustment; transmitting ampli?er 4qr - inverting output; receiving ampli?er 5qr + non-inverting output receiving ampli?er 6 gar gain adjustment, receiving ampli?er 7 mic - inverting microphone input 8 n.c. not connected 9 mic + non-inverting microphone input 10 stab current stabilizer 11 v ee negative line terminal 12 ir receiving ampli?er input 13 n.c. not connected 14 pd power-down input 15 dtmf dual-tone multi-frequency input 16 mute mute input 17 v cc positive supply decoupling 18 reg voltage regulator decoupling 19 agc automatic gain control input 20 slpe slope (dc resistance) adjustment
june 1990 5 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 functional description supply: v cc , ln, slpe, reg and stab power for the tea1067 and its peripheral circuits is usually obtained from the telephone line. the ic develops its own supply at v cc and regulates its voltage drop. the supply voltage v cc may also be used to supply external circuits e.g. dialling and control circuits. decoupling of the supply voltage is performed by a capacitor between v cc and v ee while the internal voltage regulator is decoupled by a capacitor between reg and v ee . the dc current drawn by the device will vary in accordance with varying values of the exchange voltage (v exch ), the feeding bridge resistance (r exch ), and the dc resistance of the telephone line (r line ). the tea1067 has an internal current stabilizer working at a level determined by a 3.6 k w resistor connected between stab and v ee (see fig.7). when the line current (i line ) is more than 0.5 ma greater than the sum of the ic supply current (i cc ) and the current drawn by the peripheral circuitry connected to v cc (i p ) the excess current is shunted to v ee via ln. the regulated voltage on the line terminal (v ln ) can be calculated as: v ln =v ref + i slpe r9; or v ln = v ref + [(i line - i cc - 0.5 10 - 3 a) - i p ] r9 where v ref is an internally generated temperature compensated reference voltage of 3.6 v and r9 is an external resistor connected between slpe and v ee . in normal use the value of r9 would be 20 w . changing the value of r9 will also affect microphone gain, dtmf gain, gain control characteristics, side-tone level and maximum output swing on ln, and the dc characteristics (especially at the lower voltages). under normal conditions, when i slpe >> i cc + 0.5 ma + i p , the static behaviour of the circuit is that of a 3.6 v regulator diode with an internal resistance equal to that of r9. in the audio frequency range the dynamic impedance is largely determined by r1. fig.4 shows the equivalent impedance of the circuit. at line currents below 9 ma the internal reference voltage is automatically adjusted to a lower value (typically 1.6 v at 1 ma). this means that the operation of more sets in parallel is possible with dc line voltages (excluding the polarity guard) down to an absolute minimum voltage of 1.6 v. with line currents below 9 ma the circuit has limited sending and receiving levels. the internal reference voltage can be adjusted by means of an external resistor (r va ). this resistor connected between ln and reg will decrease the internal reference voltage, connected between reg and slpe it will increase the internal reference voltage. current (i p ) available from v cc for peripheral circuits depends on the external components used. fig.10 shows this current for v cc > 2.2 v. if mute is low when the receiving amplifier is driven the available current is further reduced. current availability can be increased by connecting the supply ic (tea1081) in parallel with r1, as shown in fig.17 (c), or by increasing the dc line voltage by means of an external resistor (r va ) connected between reg and slpe.
june 1990 6 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 microphone inputs (mic + and mic - ) and gain adjustment pins (gas1 and gas2) the tea1067 has symmetrical microphone inputs. its input impedance is 64 k w (2 32 k w ) and its voltage gain is typically 52 db (when r7 = 68 k w , see fig.14). dynamic, magnetic, piezoelectric or electret (with built-in fet source followers) microphones can be used. microphone arrangements are shown in fig.11. the gain of the microphone amplifier can be adjusted between 44 db and 52 db to suit the sensitivity of the transducer in use. the gain is proportional to the value of r7 which is connected between gas1 and gas2. stability is ensured by the external capacitor c6 which is connected between gas1 and slpe. the value of c6 is 100 pf but this may be increased to obtain a first-order low-pass filter. the cut-off frequency corresponds to the time constant r7 c6. mute input (mute) when mute is high the dtmf input is enabled and the microphone and receiving amplifier inputs are inhibited. the reverse is true when mute is low or open-circuit. mute switching causes only negligible clicking on the earpiece outputs and line. if the number of parallel sets in use causes a drop in line current to below 6 ma the speech amplifiers remain active independent to the dc level applied to the mute input. fig.4 equivalent impedance circuit. r p = 16.2 k w l eq = c3 r9 r p handbook, halfpage mba454 r9 20 w reg ln c3 4.7 m f r p v ref l eq v cc v ee c1 100 m f r1 dual-tone multi-frequency input (dtmf) when the dtmf input is enabled dialling tones may be sent onto the line. the voltage gain from dtmf to ln is typically 25.5 db (when r7 = 68 k w ) and varies with r7 in the same way as the microphone gain. the signalling tones can be heard in the earpiece at a low level (confidence tone). receiving ampli?er (ir, qr + , qr - and gar) the receiving amplifier has one input (ir), one non-inverting complementary output (qr + ) and an inverting complementary output (qr - ). these outputs may be used for single-ended or differential drive depending on the sensitivity and type of earpiece used (see fig.12). ir to qr + gain is typically 31 db (when r4 = 100 k w ), this is sufficient for low-impedance magnetic or dynamic microphones which are suited for single-ended drive. using both outputs for differential drive gives an additional gain of 6 db. this feature can be used when the earpiece impedance exceeds 450 w (high-impedance dynamic or piezoelectric types). the receiving amplifier gain can be adjusted between 20 and 39 db with single-ended drive and between 26 and 45 db with differential drive, to match the sensitivity of the transducer in use. the gain is set with the value of r4 which is connected between gar and qr + . overall receive gain between ln and qr + is calculated by substracting the anti-sidetone network attenuation (32 db) from the amplifier gain. two external capacitors c4 and c7, ensure stability. c4 is normally 100 pf and c7 is 10 the value of c4. the value of c4 may be increased to obtain a first-order low-pass filter. the cut-off frequency will depend on the time constant r4 c4. the output voltage of the receiving amplifier is specified for continuous-wave drive. the maximum output voltage will be higher under speech conditions where the peak to rms ratio is higher.
june 1990 7 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 automatic gain control input (agc) automatic line loss compensation is achieved by connecting a resistor (r6) between agc and v ee . the automatic gain control varies the gain of the microphone amplifier and the receiving amplifier in accordance with the dc line current. the control range is 5.9 db. this corresponds to a line length of 5 km for a 0.5 mm diameter copper twisted-pair cable with a dc resistance of 176 w /km and an average attenuation 1.2 db/km. resistor r6 should be chosen in accordance with the exchange supply voltage and its feeding bridge resistance (see fig.13 and table 1). the ratio of start and stop currents of the agc curve is independent of the value of r6. if no automatic line loss compensation is required the agc may be left open-circuit. the amplifiers, in this condition, will give their maximum specified gain. power-down input (pd) during pulse dialling or register recall (timed loop break) the telephone line is interrupted. during these interruptions the telephone line provides no power for the transmission circuit or circuits supplied by v cc . the charge held on c1 will bridge these gaps. this bridging is made easier by a high level on the pd input which reduces the typical supply current from 1 ma to 55 m a and switches off the voltage regulator preventing discharge through ln. when pd is high the capacitor at reg is disconnected with the effect that the voltage stabilizer will have no switch-on delay after line interruptions. this minimizes the contribution of the ic to the current waveform during pulse dialling or register recall. when this facility is not required pd may be left open-circuit. side-tone suppression the anti-sidetone network, r1//z line , r2, r3, r9 and z bal , (see fig.5) suppresses transmitted signal in the earpiece. compensation is maximum when the following conditions are fulfilled: (a) r9 r2 = r1 (r3 + [r8//z bal ]); (b) (z bal / [z bal + r8]) = (z line / [z line + r1]) if fixed values are chosen for r1, r2, r3, and r9 then condition (a) will always be fulfilled when r8//z bal ? << r3. to obtain optimum side-tone suppression condition (b) has to be fulfilled resulting in: z bal = (r8/r1) z line = k.z line where k is a scale factor; k = (r8/r1) the scale factor (k), dependent on the value of r8, is chosen to meet the following criteria: (a) compatibility with a standard capacitor from the e6 or e12 range for z bal (b) z bal //r8 ? << r3 to fulfil condition (a) and thus ensuring correct anti-sidetone bridge operation (c) z bal + r8 ? >> r9 to avoid influencing the transmitter gain in practice z line varies considerably with the line type and length. the value chosen for z bal should therefore be for an average line length thus giving optimum setting for short or long lines.
june 1990 8 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 example the line balance impedance (z bal ) at which the optimum suppression is present can be calculated by: suppose z line = 210 w+ (1265 w //140 nf), representing a 5 km line of 0.5 mm diameter, copper, twisted-pair cable matched to 600 w (176 w /km; 38 nf/km). when k = 0.64 then r8 = 390 w ; z bal = 130 w+ (820 w //220 nf). the anti-sidetone network for the tea1060 family shown in fig.5 attenuates the signal received from the line by 32 db before it enters the receiving amplifier. the attenuation is almost constant over the whole audio frequency range. fig.6 shows a conventional wheatstone bridge anti-sidetone circuit that can be used as an alternative. both bridge types can be used with either resistive or complex set impedances. more information can be found in the designer guide; 9398 341 10011 fig.5 equivalent circuit of tea1060 anti-sidetone bridge. handbook, full pagewidth msa500 r1 r2 r9 r3 ir r8 v ee slpe ln z line r t i m z bal fig.6 equivalent circuit of an anti-sidetone network in a wheatstone bridge configuration. handbook, full pagewidth msa501 r1 r9 ir r8 v ee slpe ln z line r t i m r a z bal
june 1990 9 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 ratings limiting values in accordance with the absolute maximum system (iec 134) notes 1. mostly dependent on the maximum required t amb and on the voltage between ln and slpe. see figs 7 and 8 to determine the current as a function of the required voltage and the temperature. 2. calculated for the maximum ambient temperature specified t amb = 75 c and a maximum junction temperature of 125 c. thermal resistance parameter conditions symbol min. max. unit positive continuous line voltage v ln - 12 v repetitive line voltage during switch-on line interruption v ln - 13.2 v repetitive peak line voltage for a 1 ms pulse per 5 s r9 = 20 w ; r10 = 13 w (fig.16) v ln - 28 v line current tea1067 (note 1) r9 = 20 w i line - 140 ma line current TEA1067T (note 1) r9 = 20 w i line - 140 ma voltage on all other pins v i - v cc + 0.7 v - v i - 0.7 v total power dissipation (note 2) r9 = 20 w tea1067 p tot - 769 mw TEA1067T p tot - 550 mw storage temperature range t stg - 40 + 125 c operating ambient temperature range t amb - 25 + 75 c junction temperature t j -+ 125 c from junction to ambient in free air tea1067 r th j-a typ. 65 k/w TEA1067T mounted on glass epoxy board 41 19 1.5 mm r th j-a typ. 90 k/w
june 1990 10 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 fig.7 tea1067 safe operating area. t amb p tot (1) 45 c 1231 mw (2) 55 c 1077 mw (3) 65 c 923 mw (4) 75 c 769 mw handbook, halfpage 212 160 40 80 120 60 100 140 mbh133 46810 v ln -v slpe (v) i ln (ma) (1) (2) (3) (4) fig.8 TEA1067T safe operating area. t amb p tot (1) 45 c 888 mw (2) 55 c 777 mw (3) 65 c 666 mw (4) 75 c 555 mw handbook, halfpage 212 150 30 70 110 50 90 130 msa546 46810 v ln -v slpe (v) (2) (3) (4) (1) i ln (ma)
june 1990 11 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 characteristics i line = 11 to 140 ma; v ee = 0 v; f = 800 hz; t amb =25 c; unless otherwise speci?ed parameter condition symbol min. typ. max. unit supply; ln and v cc voltage drop over circuit, between ln and v ee microphone inputs open i line = 1 ma v ln - 1.6 - v i line = 4 ma v ln 1.75 2.0 2.25 v i line = 7 ma v ln 2.25 2.8 3.35 v i line = 11 ma v ln 3.55 3.8 4.05 v i line = 15 ma v ln 3.65 3.9 4.15 v i line = 100 ma v ln 4.9 5.6 6.5 v i line = 140 ma v ln -- 7.5 v variation with temperature i line = 15 ma d v ln / d t - 3 - 1 1 mv/k voltage drop over circuit, between ln and v ee with external resistor r va i line = 15 ma; r va (ln to reg) = 68 k w 3.1 3.4 3.7 v i line = 15 ma; r va (reg to slpe) = 39 k w 4.2 4.5 4.8 v supply current pd = low; v cc = 2.8 v i cc - 1.0 1.35 ma supply current pd = high; v cc = 2.8 v i cc - 55 82 m a supply voltage available for peripheral circuitry i line = 15 ma; mute = high i p = 1.4 ma v cc 2.2 2.4 - v i p = 0 ma v cc 2.95 3.2 - v microphone inputs mic + and mic - input impedance (differential) between mic - and mic + z i ? 51 64 77 k w input impedance (single-ended) mic - or mic + to v ee z i ? 25.5 32 38.5 k w common mode rejection ratio k cmr - 82 - db voltage gain mic + /mic - to ln i line = 15 ma; r7 = 68 k w g v 51 52 53 db
june 1990 12 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 gain variation with frequency at f = 300 hz and f = 3400 hz w.r.t 800 hz d g vf - 0.5 0.2 + 0.5 db gain variation with temperature at - 25 c and + 75 c w.r.t. 25 c without r6; i line = 50 ma d g vt - 0.2 - db dual-tone multi-frequency input dtmf input impedance z i ? 16.8 20.7 24.6 k w voltage gain from dtmf to ln i line = 15 ma; r7 = 68 k w g v 24.5 25.5 26.5 db gain variation with frequency at f = 300 hz and f = 3400 hz w.r.t. 800 hz d g vf - 0.5 0.2 + 0.5 db gain variation with temperature at - 25 c and + 75 c w.r.t. 25 c i line = 50 ma d g vt - 0.2 - db gain adjustment gas1 and gas2 gain variation of the transmitting amplifier by varying r7 between gas1 and gas2 d g v - 8 - 0db sending ampli?er output ln output voltage i line = 15 ma thd = 2% v ln(rms) - 1.9 - v thd = 10% v ln(rms) 1.9 2.2 - v i line = 4 ma; thd = 10% v ln(rms) - 0.8 - v i line = 7 ma; thd = 10% v ln(rms) - 1.4 - v noise output voltage i line = 15 ma; r7 = 68 k w ; 200 w between mic - and mic + ; psophometrically weighted (p53 curve) v no(rms) -- 72 - dbmp receiving ampli?er input ir input impedance z i ? 17 21 25 k w parameter condition symbol min. typ. max. unit
june 1990 13 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 receiving ampli?er outputs qr + and qr - output impedance (single-ended) z o ?- 4 -w voltage gain from ir to qr + or qr - i line = 15 ma r4 = 100 k w single-ended r l (from qr + or qr - ) = 300 w g v 30 31 32 db differential r l (from qr + or qr - ) = 600 w g v 36 37 38 db gain variation with frequency at f = 300 hz and f = 3400 hz w.r.t. 800 hz d g vf - 0.5 - 0.2 0 db gain variation with temperature at - 25 c and + 75 c w.r.t. 25 c without r6; i line = 50 ma d g vt - 0.2 - db output voltage sinewave drive i line = 15 ma; i p = 0 ma; thd = 2% r4 = 100 k w single-ended rl = 150 w v o(rms) 0.25 0.29 - v rl = 450 w v o(rms) 0.45 0.55 - v differential f = 3400 hz; series r = 100 w ; c l = 47 nf v o(rms) 0.65 0.80 - v output voltage thd = 10%; rl = 150 w r4 = 100 k w i line = 4 ma v o(rms) - 15 - mv i line = 7 ma v o(rms) - 130 - mv noise output voltage i line = 15 ma; r4 = 100 k w ; ir open-circuit psophometrically weighted; (p53 curve) single-ended rl = 300 w v no(rms) - 50 -m v differential rl = 600 w v no(rms) - 100 -m v parameter condition symbol min. typ. max. unit
june 1990 14 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 gain adjustment gar gain variation of receiving amplifier achievable by varying r4 between gar and qr d g v - 11 -+ 8db mute input input voltage high v ih 1.5 - v cc v input voltage low v il -- 0.3 v input current i mute - 815 m a gain reduction mic + or mic - to ln mute = high d g v - 70 - db voltage gain from dtmf to qr + or qr - mute = high; r4 = 100 k w ; single-ended; r l = 300 w g v - 21 - 19 - 17 db power-down input pd input voltage high v ih 1.5 - v cc v input voltage low v il -- 0.3 v input current i pd - 510 m a automatic gain control input agc controlling the gain from ir to qr + /qr - and the gain from mic + /mic - to ln; r6 between agc and v ee r6 = 110 k w gain control range i line = 70 ma d g v - 5.5 - 5.9 - 6.3 db highest line current for maximum gain i line - 23 - ma minimum line current for minimum gain i line - 61 - ma reduction of gain between i line = 15 ma and i line = 35 ma d g v - 1.0 - 1.5 - 2.0 db parameter condition symbol min. typ. max. unit
june 1990 15 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 fig.9 supply arrangement. handbook, full pagewidth mbh123 r exch r line i line v exch dc ac reg c3 r5 r9 stab slpe ln v cc v ee 0.5 ma r1 i slpe i slpe + 0.5 ma i cc c1 peripheral circuits i p tea1067 fig.10 typical current i p available from v cc for peripheral circuitry with v cc 3 2.2 v. curve (a) is valid when the receiving amplifier is not driven or when mute = high, curve (b) is valid when mute = low and the receiving amplifier is driven; v o(rms) = 150 mv, r l = 150 w asymmetrical. the supply possibilities can be increased simply by setting the voltage drop over the circuit v ln to a higher value by means of resistor r va connected between reg and slpe. (a) i p = 1.8 ma (b) i p = 1.35 ma i line = 15 ma at v ln = 3.9 v r1 = 620 w and r9 = 20 w . handbook, halfpage 012 4 0 2 mgr085 3 1 v cc (v) i p (ma) a b
june 1990 16 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 fig.11 alternative microphone arrangements. (a) magnetic or dynamic microphone. the resistor marked (1) may be connected to decrease the terminating impedance. (b) electret microphone. (c) piezoelectric microphone. handbook, full pagewidth mgr086 v ee v cc (1) (a) (b) (c) mic + mic - mic - mic + mic - mic + fig.12 alternative receiver arrangements. (a) dynamic earpiece with less than 450 w impedance. (b) dynamic earpiece with more than 450 w impedance. (c) magnetic earpiece with more than 450 w impedance. the resistor marked (1) may be connected to prevent distortion (inductive load). (d) piezoelectric earpiece. the resistor marked (2) is required to increase the phase margin (capacitive load). handbook, full pagewidth mgr087 (1) (2) qr - qr + v ee qr - qr + qr - qr + qr - qr + (a) (b) (c) (d)
june 1990 17 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 fig.13 variation of gain with line current, with r6 as a parameter. handbook, full pagewidth msa507 - 6 - 4 - 2 0 d g v (db) 140 120 100 80 60 40 20 0 78.7 k w 110 k w 140 k w r9 = 20 w r6 = i line (ma) table 1 values of resistor r6 for optimum line loss compensation, for various usual values of exchange supply voltage (v exch ) and exchange feeding bridge resistance (r exch ); r9 = 20 w . r exch ( w ) 400 600 800 1000 r6 (k w ) v exch 36 100 78.7 x x (v) 48 140 110 93.1 82 60 x x 120 102
june 1990 18 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 handbook, full pagewidth mgr088 v cc ln pd mute dtmf mic - mic + ir 620 w tea1067 r4 100 k w r l 600 w i line c4 100 pf c7 1 nf 1 to 140 ma 100 m f c1 100 m f r7 68 k w c6 100 pf r1 qr - qr + gar gas1 gas2 v o v ee reg agc stab r9 20 w r5 3.6 k w r6 c3 4.7 m f slpe 10 m f v i v i fig.14 test circuit for defining voltage gain of mic + , mic - and dtmf inputs. voltage gain is defined as: g v = 20 log v o /v i ? . for measuring the gain from mic + and mic - the mute input should be low or open, for measuring the dtmf input mute should be high. inputs not under test should be open. fig.15 test circuit for defining voltage gain of the receiving amplifier. handbook, full pagewidth mgr089 v cc ln pd mute dtmf mic - mic + ir 620 w tea1067 r4 100 k w 600 w i line c4 100 pf c7 1 nf 1 to 140 ma 100 m f c1 100 m f r7 c6 100 pf 10 m f 10 m f r1 z l qr - qr + gar gas1 gas2 v i v o v ee reg agc stab r9 20 w r5 3.6 k w r6 c3 4.7 m f slpe voltage gain is defined as: g v = 20 log v o /v i ? .
june 1990 19 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 application information fig.16 typical application of the tea1067, shown here with a piezoelectric earpiece and dtmf dialling. the bridge to the left, the zener diode and r10 limit the current into the circuit and the voltage across the circuit during line transients. pulse dialling or register recall require a different protection arrangement. the dc line voltage can be set to a higher value by the resistor r va (reg to slpe). handbook, full pagewidth mgr090 620 w r1 mic - mic + gar qr - ir qr + slpe mute pd gas1 ln v cc gas2 reg agc stab v ee dtmf 390 w r8 r6 + - c3 4.7 m f r9 20 w r5 3.6 k w r7 c5 100 nf z bal 100 pf c6 r3 3.92 k w r2 130 k w bzx79- c12 bas11 (2 ) bzw14 (2 ) telephone line r10 13 w r va c1 100 m f tea1067 r4 r11 c4 100 pf c7 1 nf from dial and control circuits
june 1990 20 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 fig.17 typical applications of the tea1067 (simplified). (a) dtmf-pulse set with cmos dialling circuit pcd3310. the dashed lines show an optional flash (register recall by timed loop break). (b) pulse dial set with one of the pcd3320 family of cmos interrupted current-loop dialling circuits. (c) dual-standard (pulse and dtmf) feature phone with the pcd3343 cmos controller and the pcd3312 cmos dtmf generator with i 2 c-bus. supply is provided by the tea1081 supply circuit. handbook, full pagewidth mgr091 tea1067 tea1081 telephone line cradle contact bst76 v ee ln v cc dtmf mute pd pcd3343 v ss v dd m dp/fl dtmf i 2 c-bus tea1067 telephone line cradle contact bst76 v ee ln v cc dtmf mute pd pcd3310 v ss v dd m dtmf fl (a) (b) (c) tea1067 telephone line cradle contact bst76 v ee ln v cc dtmf mute pd pcd3320 family v ss v dd m dp pcd3312
june 1990 21 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 package outlines references outline version european projection issue date iec jedec eiaj sot102-1 93-10-14 95-01-23 unit a max. 12 b 1 (1) (1) (1) b 2 cd e e m z h l mm dimensions (inch dimensions are derived from the original mm dimensions) a min. a max. b max. w m e e 1 1.40 1.14 0.53 0.38 0.32 0.23 21.8 21.4 6.48 6.20 3.9 3.4 0.254 2.54 7.62 8.25 7.80 9.5 8.3 0.85 4.7 0.51 3.7 inches 0.055 0.044 0.021 0.015 0.013 0.009 1.40 1.14 0.055 0.044 0.86 0.84 0.26 0.24 0.15 0.13 0.01 0.10 0.30 0.32 0.31 0.37 0.33 0.033 0.19 0.020 0.15 m h c (e ) 1 m e a l seating plane a 1 w m b 1 b 2 e d a 2 z 18 1 10 9 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. dip18: plastic dual in-line package; 18 leads (300 mil) sot102-1
june 1990 22 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.30 0.10 2.45 2.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot163-1 10 20 w m b p detail x z e 11 1 d y 0.25 075e04 ms-013ac pin 1 index 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.51 0.49 0.30 0.29 0.050 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 0 5 10 mm scale x q a a 1 a 2 h e l p q e c l v m a (a ) 3 a so20: plastic small outline package; 20 leads; body width 7.5 mm sot163-1 95-01-24 97-05-22
june 1990 23 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (order code 9398 652 90011). dip s oldering by dipping or by wave the maximum permissible temperature of the solder is 260 c; solder at this temperature must not be in contact with the joint for more than 5 seconds. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (t stg max ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. r epairing soldered joints apply a low voltage soldering iron (less than 24 v) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 and 400 c, contact may be up to 5 seconds. so r eflow soldering reflow soldering techniques are suitable for all so packages. reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. w ave soldering wave soldering techniques can be used for all so packages if the following conditions are observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the longitudinal axis of the package footprint must be parallel to the solder flow. the package footprint must incorporate solder thieves at the downstream end. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. r epairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
june 1990 24 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.
june 1990 25 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 notes
june 1990 26 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 notes
june 1990 27 philips semiconductors product speci?cation low voltage versatile telephone transmission circuit with dialler interface tea1067 notes
internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1998 sca60 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors 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novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381 printed in the netherlands 415102/00/02/pp28 date of release: june 1990 document order number: 9397 750 nnnnn

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